A nonvolatile memory is a type of memory that retains stored data when power is removed. There are various types of nonvolatile memories, including read only memories (ROMs), programmable read only memories (PROMs), erasable programmable read only memories (EPROMs), electrically erasable programmable read only memories (EEPROMs), and flash EEPROMs. EEPROMs and flash EEPROMs are commonly used in data processing systems requiring a nonvolatile memory that is re-programmable.
Both ROM and PROM generally include an array of single transistor memory cells. In a ROM, the logic state of a memory cell is determined by adjusting the threshold voltage (V.sub.T) of the transistor. The V.sub.T of a transistor determines what V.sub.GS (gate to source voltage) will cause the transistor to be conductive and non-conductive. The V.sub.T of a ROM is preprogrammed by the manufacturer. In a PROM, the logic state of a memory cell is also determined by the V.sub.T of the transistor, but the V.sub.T is one-time programmable by the user. The logic state of the memory cells in ROMs and PROMs cannot be altered once they are programmed.
An EEPROM and an EPROM generally includes an array of floating gate, single transistor memory cells. An EPROM is electrically programmed, but the entire memory array is bulk erased using ultraviolet (UV) light. In contrast, an EEPROM and a flash EEPROM are electrically programmed and electrically erased. The term "flash" refers to the fact that the flash EEPROM can be bulk erased much more quickly than an EPROM. It may take less than two minutes to erase a flash EEPROM memory cell, compared to about 20 minutes to erase an EPROM with UV light.
A nonvolatile memory that uses floating gate transistors is usually programmed to have a different V.sub.T from that of the unprogrammed floating gate transistors. The difference in the V.sub.T between a programmed floating gate transistor and an unprogrammed floating gate transistor causes a difference in the conductivity of the floating gate transistor. The difference in conductivity is used to distinguish between a logic "one" and a logic "zero". A floating gate transistor can be erased and reprogrammed to a new logic state when necessary.
There are various ways to program and erase a floating gate transistor. For example, a floating gate transistor can be programmed by using hot carrier injection to transport electrons to the floating gate, thus raising the V.sub.T. The floating gate transistor can then be erased by using Fowler-Nordheim tunneling to transport electrons from floating gate to the source terminal, thereby lowering the V.sub.T.
Another way to program the floating gate transistor is by using Fowler-Nordheim tunneling to transport electrons from the floating gate to the drain, and to erase the floating gate transistor by using Fowler-Nordheim tunneling to transport electrons to the floating gate. Lowering the V.sub.T programs the floating gate transistor, and raising the V.sub.T erases the floating gate transistor. Regardless of the method used to program and erase the floating gate transistor, the effect of trapping electrons on the floating gate is to raise the V.sub.T of the floating gate transistor such that there is no conductive path through the floating gate transistor during a read operation of the nonvolatile memory. The removal of the electrons from the floating gate lowers the V.sub.T of the floating gate transistor such that the floating gate transistor provides a conductive path during a read operation of the nonvolatile memory.
For proper operation during a read cycle, a minimum amount of current should flow through a selected floating gate transistor that has a lowered V.sub.T. For a predetermined cell size, the amount of current flowing through the floating gate transistor is determined by the V.sub.T and the V.sub.GS. The amount the V.sub.T is shifted during programming and erasing must be controlled to ensure proper operation of the nonvolatile memory. For example, if the V.sub.T of the unselected floating gate transistor is shifted too low, the unselected floating gate transistor may not be sufficiently non-conductive, thus adversely affecting the operation of the entire memory.
During a read cycle, the V.sub.GS of a selected memory cell is usually equal to the power supply voltage, which is 5 volts in most of the applications. However, as nonvolatile memories are being designed to operate at lower power supply voltages, such as 3 volts, 1.8 volts, or even as low as 0.9 volts, the V.sub.T must be even more precisely controlled for proper operation. At 0.9 volts, the lower V.sub.T limit is required to be slightly above zero volts for achieving the required current during a read cycle. In ROMs, PROMs, and EPROMs, the lower V.sub.T limit can be achieved by adjusting the manufacturing process. In EEPROMs, and flash EEPROMs, the lower V.sub.T limit can be achieved by removing more electrons from the floating gate. However, this lower V.sub.T may not fall within the prescribed range, and may even become negative, causing the floating gate transistor to "leak" current, or be conductive when a word line to which it is coupled is not selected.